Qualcomm is seeking a Senior/Staff RTL Design Engineer to join their team in either Hod HaSharon or Haifa, Israel. This role is integral to the development of micro-controllers and application processors, requiring extensive experience in RTL design and SoC integration.
The position demands a seasoned professional with at least 10 years of experience in RTL design, focusing on memory controller and interconnect IP design. The ideal candidate will be responsible for developing functional units while collaborating across multiple teams including architecture, verification, modeling, validation, and implementation to achieve optimal performance, power, and area (PPA) goals.
Qualcomm offers a comprehensive benefits package including world-class health coverage, financial planning programs, and continuous learning opportunities. The company's culture promotes innovation and collaboration, working alongside some of the industry's leading engineering and technology experts.
The role requires strong technical expertise in Verilog, synthesis tools, and deep understanding of SoC systems. Knowledge of cache coherence and bus protocols (AMBA5 CHI, AMBA4 ACE or AXI) is highly valued. The position involves working with cutting-edge technology in a company that's at the forefront of wireless technology innovation.
This is an in-person position requiring 5 days per week office presence, offering the opportunity to work on challenging projects that impact global technology advancement. The role combines technical leadership with hands-on development, making it ideal for experienced engineers looking to further their careers in hardware design and system architecture.
Working at Qualcomm means joining a team that values diversity, continuous learning, and innovation. The company provides extensive support for professional growth through mentorship programs and educational opportunities. This position offers the chance to work on complex technical challenges while contributing to world-changing innovations in wireless technology and semiconductor design.