Video Architecture/HW Design Engineer
Description For Video Architecture/HW Design Engineer
Qualcomm, a global leader in wireless technology and mobile chipsets, is seeking a Video Architecture/HW Design Engineer for their Multimedia Video HW Design team in Seoul. This role combines hardware engineering with software development, focusing on cutting-edge Video CODEC Standards implementation.
The position offers an exciting opportunity to work on complex IP Cores development, requiring expertise in both hardware and software domains. As a senior member of the team, you'll be responsible for implementing multimedia video algorithms, developing micro-architecture and RTL designs, and collaborating across hardware, systems, and firmware teams.
The ideal candidate will bring 3+ years of industry experience in ASIC or Logic Design, with strong proficiency in Verilog/SystemVerilog and programming languages like C++/Python. This role is perfect for someone who enjoys challenging work and wants to impact next-generation video processing technologies.
Key aspects of the role include optimizing designs for power, performance, and area while maintaining high-quality standards through various verification processes. You'll be working with state-of-the-art tools and technologies, contributing to high-volume applications that power millions of devices worldwide.
This position offers the opportunity to work with a global, multi-disciplinary team, leading design blocks and contributing to cutting-edge technology development. The role combines technical expertise with leadership responsibilities, making it ideal for engineers looking to advance their careers in hardware design while working for one of the world's leading semiconductor companies.
Responsibilities For Video Architecture/HW Design Engineer
- Implementation of Multimedia Video algorithms
- Cross-team collaboration between Hardware/Systems/Firmware
- Development of Micro-Architecture and RTL design
- Debugging and root causing bugs during simulation/emulation
- Reviewing reports for Linting, RTL Synthesis, CLP, CDC, and DV Coverage
- Design micro-architecture and RTL implementation using Verilog/SystemVerilog HDL
- Work with Design Verification team for functional/gate level verification
Requirements For Video Architecture/HW Design Engineer
- 3+ years of industry experience ASIC or Logic Design, verification
- 3+ years of industry experience with Verilog, SystemVerilog
- 2+ years of recent experience with C/C++, Python/Perl
- Experience with low-power and high throughput/performance RTL design
- Experience with image/video compression and pixel processing
- Familiarity with computer vision or machine learning algorithms
- 1+ years of experience with leading a design block
- Experience working in a multi-disciplinary, global team
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