Sr. ASIC Design Engineer (Silicon Engineering)

SpaceX, a pioneering space exploration company, is seeking a Senior ASIC Design Engineer to join their Silicon Engineering team in Irvine, CA. This role is crucial for developing cutting-edge next-generation FPGAs and ASICs for deployment in space and ground infrastructures supporting the Starlink satellite constellation, the world's most advanced broadband internet system.

The position offers an opportunity to work alongside world-class cross-disciplinary teams, developing innovative solutions that expand the performance and capabilities of the Starlink network. You'll be responsible for designing complex SoC blocks, implementing architectural solutions, and participating in all phases of ASIC and FPGA design flow.

The ideal candidate should have at least 5 years of experience with ASICs or FPGAs, strong technical skills in digital design, and a bachelor's degree in electrical engineering, computer engineering, or computer science. Experience with multicore CPU subsystem design, high-reliability implementations, and various EDA tools is highly valued.

This role offers competitive compensation ranging from $160,000 to $220,000 per year, along with comprehensive benefits including medical coverage, 401(k), stock options, and paid time off. Join SpaceX in their mission to make humanity a multi-planetary species while working on revolutionary technology that's providing internet access to millions worldwide.