RTL Engineer- CPU Load/Store Unit (LSU)

Leading industry company developing cutting-edge AI technology and high-performance RISC-V CPUs.
$100,000 - $500,000
Embedded
Senior Software Engineer
Hybrid
101 - 500 Employees
5+ years of experience
AI

Description For RTL Engineer- CPU Load/Store Unit (LSU)

Tenstorrent is at the forefront of AI technology innovation, developing cutting-edge solutions that combine high-performance RISC-V CPU architecture with AI capabilities. They are seeking an experienced RTL Engineer to focus on the CPU Load/Store Unit (LSU) development. This role offers an opportunity to work with a highly experienced team on developing a from-scratch high-performance CPU based on RISC-V ISA.

The position requires deep expertise in CPU microarchitecture and RTL design, with responsibilities spanning from detailed hardware design to system-level architecture. The successful candidate will be involved in all aspects of CPU development, from RTL coding in Verilog to working closely with performance, DV, and physical design engineers to create optimal solutions.

The role offers a competitive compensation package ranging from $100k to $500k, including base and variable compensation, with the final offer depending on experience, skills, education, and location. The position is hybrid-based out of Austin, TX or Santa Clara, CA, offering flexibility while maintaining in-person collaboration.

This is an excellent opportunity for experienced engineers passionate about CPU architecture and AI technology to join a company that values collaboration, curiosity, and innovation. The role requires significant technical expertise and offers the chance to work on cutting-edge technology that's reshaping the computing landscape.

Last updated 10 days ago

Responsibilities For RTL Engineer- CPU Load/Store Unit (LSU)

  • RTL design and Microarchitecture of the Load/Store unit for high performance RISC-V CPU
  • RTL coding in Verilog using industry and open-source tools
  • Work with design, test and post silicon validation teams
  • Drive trade-offs for logic optimization
  • Deploy innovative techniques for improving power, performance and area
  • Debug RTL/logic issues across various hierarchies
  • Enhance RTL design environment, tools and infrastructure

Requirements For RTL Engineer- CPU Load/Store Unit (LSU)

  • BS/MS/PhD in EE/ECE/CE/CS with at least 5 years of industry experience
  • Strong background in high performance OOO CPU microarchitecture
  • Experience working on x86, ARM or RISC-V based CPU
  • Architectural understanding of load/store engines, memory consistency, MMU
  • Expertise in logic design and evaluation
  • Strong experience with hardware description languages
  • Expertise in microarchitecture definition and specification development
  • Strong problem solving and debug skills

Benefits For RTL Engineer- CPU Load/Store Unit (LSU)

  • Competitive compensation package
  • Benefits

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