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FPGA Interview Experience - United States

April 11, 2019
Positive ExperienceNo Offer

Process

The interview began with a HackerRank quiz asking questions related to Digital Logic design and Boolean algebra. Meeting the minimum requirements for this led to a 30-minute phone screen interview testing Verilog skills and Digital Logic design knowledge.

Questions

What are latch and hold times?

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Interview Statistics

The following metrics were computed from 2 interview experiences for the Akuna Capital FPGA role in United States.

Success Rate

0%
Pass Rate

Akuna Capital's interview process for their FPGA roles in the United States is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive50%
Neutral0%
Negative50%

Candidates reported having mixed feelings for Akuna Capital's FPGA interview process in United States.

Akuna Capital Work Experiences