Met with 5 team members on-site after a phone chat with the hiring manager.
Questions covered a variety of topics, including Verilog, C, ASIC design flow, and project experiences.
The interview was not too difficult but covered wide areas.
Truth table of a simple Verilog module: blocking/unblocking assignments.
Explain LFSR, and what it does.
Metastability and cross-clock domains:
The following metrics were computed from 5 interview experiences for the AMD ASIC Design Engineer role in United States.
AMD's interview process for their ASIC Design Engineer roles in the United States is fairly selective, failing a large portion of engineers who go through it.
Candidates reported having very good feelings for AMD's ASIC Design Engineer interview process in United States.