The process involved a technical screening (45 minutes), followed by a full-panel interview consisting of four 45-minute interviews. The entire process took approximately one month. The team members kept me updated on the application status.
Technical Screening:
Q: I was asked about basic programming questions like LeetCode (easy), mostly based on arrays, hash maps, and strings. There was also a resume discussion.
Full-Panel:
Q: Questions on SystemVerilog constraints, fork-join, mailboxes, and semaphores. Q: Was asked to write a scoreboard for an Asynchronous FIFO. Q: Monitor and scoreboard code for an AXI write transaction (project-based). Q: Resume-based discussions. Q: Some basic programming problems in the language of preference.
The following metrics were computed from 16 interview experiences for the AMD Design Verification Engineer role in United States.
AMD's interview process for their Design Verification Engineer roles in the United States is extremely selective, failing the vast majority of engineers.
Candidates reported having very good feelings for AMD's Design Verification Engineer interview process in United States.