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ASIC Design Engineer Interview Experience - Cupertino, California

February 1, 2014
Neutral ExperienceNo Offer

Process

After two rounds of phone interviews, an onsite interview was offered. The onsite interview had two rounds.

In the first round, there were five people in total, including the hiring manager, a director, and three other group members. They mainly asked about my Ph.D. dissertation and posed basic technical questions such as:

  • Static timing analysis
  • Common low-power techniques
  • Setup/hold violations
  • MBIST
  • Scan test
  • Perl coding

In the second round, the first two people were engineers from different groups. They primarily asked about Verilog coding. The last person asked a couple of intelligence questions.

Questions

The most unexpected question is which part of your Ph.D. work makes you most proud.

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Interview Statistics

The following metrics were computed from 4 interview experiences for the Apple ASIC Design Engineer role in Cupertino, California.

Success Rate

0%
Pass Rate

Apple's interview process for their ASIC Design Engineer roles in Cupertino, California is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive50%
Neutral50%
Negative0%

Candidates reported having very good feelings for Apple's ASIC Design Engineer interview process in Cupertino, California.

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