Two phone interviews followed by a one-day on-site interview.
For the on-site portion:
Questions on logic design, synthesis, and computer architecture, such as cross-clock domain issues, cache, state machines, and low-power design techniques.
Only one behavioral question was asked.
Also asked about past projects.
The following metrics were computed from 4 interview experiences for the Apple ASIC Design Engineer role in Cupertino, California.
Apple's interview process for their ASIC Design Engineer roles in Cupertino, California is extremely selective, failing the vast majority of engineers.
Candidates reported having very good feelings for Apple's ASIC Design Engineer interview process in Cupertino, California.