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ASIC Design Engineer Interview Experience - Cupertino, California

January 1, 2019
Positive ExperienceNo Offer

Process

Two phone interviews followed by a one-day on-site interview.

For the on-site portion:

  • Lunch with the team leader.
  • Met with six designers from the team, each for approximately 45 minutes.

Questions

Questions on logic design, synthesis, and computer architecture, such as cross-clock domain issues, cache, state machines, and low-power design techniques.

Only one behavioral question was asked.

Also asked about past projects.

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Interview Statistics

The following metrics were computed from 4 interview experiences for the Apple ASIC Design Engineer role in Cupertino, California.

Success Rate

0%
Pass Rate

Apple's interview process for their ASIC Design Engineer roles in Cupertino, California is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive50%
Neutral50%
Negative0%

Candidates reported having very good feelings for Apple's ASIC Design Engineer interview process in Cupertino, California.

Apple Work Experiences