The overall process was smooth but complex, with multiple rounds of interviews, and things went great but got rejected without any reasoning. I felt that the interviews were going pretty smooth.
Designing a UVM checker from scratch for a made-up protocol
The following metrics were computed from 1 interview experience for the Apple ASIC Design Verification Engineer role in China, Texas.
Apple's interview process for their ASIC Design Verification Engineer roles in China, Texas is extremely selective, failing the vast majority of engineers.
Candidates reported having mixed feelings for Apple's ASIC Design Verification Engineer interview process in China, Texas.