Arm

Chandler office. CPU verification team. 1. Logic design - Gave a Verilog code -> build circuit -> optimize it. FSM design 2. Verification - UVM architecture. How will you debug a processor? Verify interrupts in pipeline 3. C++ : Constructors, memory

Applied online and got phone interview 2 weeks later. One week later, interviewed onsite with 6 different engineers. It was a great learning experience to talk to different design and verification engineer. Also learn a lot from talking to the Dir

First round was a phone interview. Second round was onsite. Detailed rounds related to verification,architecture,logic design and software engineering. Debugging a processor,FSM,Pipelined microprocessor,Hazards, Caches, Virtual memory,Linux based qu