Two rounds of technical and one round of aptitude based. Digital, static timing analysis and C programming was asked. Stick to basics l. Mealey and Moore FSM's were an important point of discussion.
Digital electronics was the main topic.
The following metrics were computed from 2 interview experiences for the Cadence Design Systems Application Engineer Intern role in India.
Cadence Design Systems's interview process for their Application Engineer Intern roles in India is fairly selective, failing a large portion of engineers who go through it.
Candidates reported having very good feelings for Cadence Design Systems's Application Engineer Intern interview process in India.