Basically interview consists of 3 rounds. It was through referral so I got a call from the Team1.

Technical interview They started with M-Tech projects related to VLSI then with basics of analog and digital like MOSFET operations, body effect CMOS design for a given equation, low power techniques, Verilog basics, STA concepts like setup, hold, how to avoid violations, why STA is important, latch up condition, logical degradation, ASIC Flow, verilog code for Asynchronous D Flip Flop, differences between latch and flip flop, task and function, mealy and Moore, nand and nor, which gate is widely used and why? Etc..2.

Managerial round All situation based question like why Cadence, are you interested in this profile and why etc ( Refer HR questions and Prepare).3.

HR round He called discussed and internship roles and responsibilities and said you are selected.

STA

Digital design

Analog design

VLSI flows

Verilog

Physical design basics