I had an interview for design Verification:

1st round : Self introduction Basic questions from digital electronics Verilog C programming

2nd around: Questions and code related to Verilog FSM code Various clock divider circuits implemention SystemVerilog topics like polymorphism abstraction interface clocking block arrays

Questions and code : SystemVerilog functional coverage and assertions

Questions related to protocols which I was mentioned in my resume.

Questions related various UVM topics.

Some logical questions

What is the difference between Moore and melay circuits?

Implement and write a code to detect 10110 Sequence?

Frequency divide by 7

UVM phrases

What is inheritence, ploymorphism, and abstraction in SystemVerilog?