Product Engineering Interview Experience - San Jose, California
Process
Phone interview was scheduled through email, asked basic Verilog question. Then I was called for an onsite. Received offer after 2 days. Important topics: Writing synthesizable code Understanding ASIC flow. Assertions. How do to debug a design.
Questions
Difference between blocking and non blocking assignment stmts.
Questions related to Gate Level Simulations
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Interview Statistics
The following metrics were computed from 1 interview experience for the Cadence Design Systems Product Engineering role in San Jose, California.
Success Rate
Cadence Design Systems's interview process for their Product Engineering roles in San Jose, California is incredibly easy as the vast majority of engineers get an offer after going through it.
Experience Rating
Candidates reported having very good feelings for Cadence Design Systems's Product Engineering interview process in San Jose, California.
Cadence Design Systems Work Experiences
- 4.0BenifitsProduct Engineering • Current EmployeeNoida, IndiaJune 25, 2024Pros: Subsidized food, Gym, cabs, team outings....Cons: There was a hectic schedule on some days.
- 3.0Good WLB but nothing to learnSoftware Engineer • Former EmployeeSan Jose, CaliforniaMarch 10, 2026Pros: Good WLB chill, supportive teamCons: There was nothing to learn here.
- 5.0Great CompanyApplication-Engineer • Current EmployeeSan Jose, CaliforniaNovember 6, 2023Pros: It is an ever evolving technology with strong leadership.Cons: None - the company is doing very well.
