Subsidized food, Gym, cabs, team outings....
There was a hectic schedule on some days.
Phone interview was scheduled through email, asked basic Verilog question. Then I was called for an onsite. Received offer after 2 days. Important topics: Writing synthesizable code Understanding ASIC flow. Assertions. How do to debug a design.
2 phone interviews - One purely technical with 3 members and one was a discussion with the manager. Technical interview was based on physical design including explaining the PD flow, about clock trees and techniques adopted to avoid SI and also about
The experience was very industry oriented with actual experience instead of only theoretical knowledge. It was focused on basics and tested aptitude for learning. It was more practical oriented than DSA focused. Three out of four rounds were in their
Phone interview was scheduled through email, asked basic Verilog question. Then I was called for an onsite. Received offer after 2 days. Important topics: Writing synthesizable code Understanding ASIC flow. Assertions. How do to debug a design.
2 phone interviews - One purely technical with 3 members and one was a discussion with the manager. Technical interview was based on physical design including explaining the PD flow, about clock trees and techniques adopted to avoid SI and also about
The experience was very industry oriented with actual experience instead of only theoretical knowledge. It was focused on basics and tested aptitude for learning. It was more practical oriented than DSA focused. Three out of four rounds were in their