Good company to work with
Good company to work with
The company has a good work culture and good learning.
Decent company if you are in initial days of your career
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Cadence Design Systems Interview Experiences
Design Verification Engineer
The questions were practical starting with digital question on FSMs, counters, ff, latches etc. Then Verilog questions involving codes of blocking and non blocking assignments, questions on delays, regions, fork blocks etc. At last, SV questions we
Design Verification Engineer
There are three technical rounds namely from junior technical, senior technical and manager of Cadence. Then there is an HR round. Topics like pipelining & hazards, Cache, Assembly language, VHDL, C, frequency divider, clock generation using VHDL ar
Design Verification Engineer
Basic SV questions with coding. Too many questions on IP. Good interview with manager and one team. 1 phone round and 1 video coding round. Questions about your experience overall
Design Verification Engineer
New Delhi, IndiaJuly 29, 2022The questions were practical starting with digital question on FSMs, counters, ff, latches etc. Then Verilog questions involving codes of blocking and non blocking assignments, questions on delays, regions, fork blocks etc. At last, SV questions we
Design Verification Engineer
IndiaJuly 18, 2021There are three technical rounds namely from junior technical, senior technical and manager of Cadence. Then there is an HR round. Topics like pipelining & hazards, Cache, Assembly language, VHDL, C, frequency divider, clock generation using VHDL ar
Design Verification Engineer
United StatesJuly 31, 2021Basic SV questions with coding. Too many questions on IP. Good interview with manager and one team. 1 phone round and 1 video coding round. Questions about your experience overall
