Work-life balance: 9/10. Benefits: still stuck in beta testing
Work-life balance: 9/10. Benefits: still stuck in beta testing
Offers a good work-life balance, with reasonable hours and respect for personal time. The team is composed of kind and supportive co-workers, creating a collaborative environment. The work feels meaningful and not very stressful.
The pay is relatively low compared to industry standards, and the location is inconvenient. Job security is also a concern, as there have been regular layoffs that create uncertainty among employees.
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Cadence Design Systems Interview Experiences
Software Engineer
It was great experience helps me to improve a lot of qualities of mine and able to crack the company. There were total 3 rounds. The first one was basic written paper after that short interview to see skills
Software Engineer (Internship)
I applied on their website and got an email from one of their software directors within a month or so saying he wanted to schedule a phone interview. The next day we talked for about a half hour and then they offered me the job within a few days. H
Application Engineer
Unscheduled telephone call: I was not expecting the call and was in the middle of another project. The interview started by asking a technical question about SystemVerilog - write code in your head - image the design. ---- I refuse to recite codin
Software Engineer
Pune, IndiaFebruary 1, 2021It was great experience helps me to improve a lot of qualities of mine and able to crack the company. There were total 3 rounds. The first one was basic written paper after that short interview to see skills
Software Engineer (Internship)
Upland, IndianaMay 1, 2018I applied on their website and got an email from one of their software directors within a month or so saying he wanted to schedule a phone interview. The next day we talked for about a half hour and then they offered me the job within a few days. H
Application Engineer
February 1, 2011Unscheduled telephone call: I was not expecting the call and was in the middle of another project. The interview started by asking a technical question about SystemVerilog - write code in your head - image the design. ---- I refuse to recite codin
