The first round was essentially a screening interview with the recruiter. We mostly discussed my resume, past experiences, and had a general conversation about the company and the role.
The second round was more technical. It involved a deeper dive into the projects I’ve worked on, along with some SystemVerilog snippets that I was asked to analyze and provide input or write code for based on the scenarios given.
My projects were relevant to the job role.
The following metrics were computed from 1 interview experience for the Cisco ASIC Design Verification Engineer role in San Jose, California.
Cisco's interview process for their ASIC Design Verification Engineer roles in San Jose, California is extremely selective, failing the vast majority of engineers.
Candidates reported having very good feelings for Cisco's ASIC Design Verification Engineer interview process in San Jose, California.