FPGA & ASIC Engineer Interview Experience - New York, New York
Process
The interview is a traditional process. They asked some random, generic questions. Then, you get a take-home assignment.
The take-home assignment is based on a new DV method called cocotb. They do not review your submission thoroughly.
Questions
-
How do you check if a system is little-endian or big-endian?
-
You need to write a testbench for a rewind and commit type of FIFO with a depth of 256.
Was this helpful?
Interview Statistics
The following metrics were computed from 1 interview experience for the Hudson River Trading FPGA & ASIC Engineer role in New York, New York.
Success Rate
Hudson River Trading's interview process for their FPGA & ASIC Engineer roles in New York, New York is extremely selective, failing the vast majority of engineers.
Experience Rating
Candidates reported having very negative feelings for Hudson River Trading's FPGA & ASIC Engineer interview process in New York, New York.
Hudson River Trading Work Experiences
- 5.0I have no clue what I'm doing. Please helpAlgorithm Developer • Current EmployeeNew York, New York, United StatesOctober 14, 2025Pros: Good place to work at.Cons: None whatsoever.
- 4.0Good, but more politicsAlgorithm Developer • Former EmployeeNew York, New York, United StatesOctober 6, 2025Pros: - Good pay - Smart and motivated coworkersCons: - increasingly political - managerial favoritism
- 2.0Decent Perks, Toxic GrowthAlgorithm Engineer • Current EmployeeNew York, New York, United StatesSeptember 11, 2025Pros: Ok-ish compensation and pretty good perksCons: Career growth is meh and increasingly toxic.
Hudson River Trading Interview Questions
