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Formal Verification Engineer Interview Experience - New Delhi, India

March 1, 2022
Negative ExperienceNo Offer

Process

Candidates are shortlisted through resumes. After that, they call me during my free time for the interview.

The interviewer was very polite and easy to talk to. He started by discussing my resume and asked some questions regarding it.

He also asked some verification coding questions and assessed my knowledge of Verilog basics.

Questions

  1. Basics of Verilog.

  2. Verification coding questions.

  3. Coding questions in Verilog.

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Interview Statistics

The following metrics were computed from 1 interview experience for the Intel Formal Verification Engineer role in New Delhi, India.

Success Rate

0%
Pass Rate

Intel's interview process for their Formal Verification Engineer roles in New Delhi, India is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive0%
Neutral0%
Negative100%

Candidates reported having very negative feelings for Intel's Formal Verification Engineer interview process in New Delhi, India.

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