Had 2 stages of interviews.
The first stage asked basics and also about past experience, covering most basics of all VLSI domains: Verilog, SystemVerilog, and digital design. The second stage focused on basic logical skills and your mindset towards problem-solving.
Basics of SV, SVA, Verilog
The following metrics were computed from 5 interview experiences for the Intel Formal Verification Engineer role in India.
Intel's interview process for their Formal Verification Engineer roles in India is fairly selective, failing a large portion of engineers who go through it.
Candidates reported having very good feelings for Intel's Formal Verification Engineer interview process in India.