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Formal Verification Engineer Interview Experience - India

July 1, 2021
Positive ExperienceGot Offer

Process

Had 2 stages of interviews.

The first stage asked basics and also about past experience, covering most basics of all VLSI domains: Verilog, SystemVerilog, and digital design. The second stage focused on basic logical skills and your mindset towards problem-solving.

Questions

Basics of SV, SVA, Verilog

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Interview Statistics

The following metrics were computed from 5 interview experiences for the Intel Formal Verification Engineer role in India.

Success Rate

40%
Pass Rate

Intel's interview process for their Formal Verification Engineer roles in India is fairly selective, failing a large portion of engineers who go through it.

Experience Rating

Positive80%
Neutral0%
Negative20%

Candidates reported having very good feelings for Intel's Formal Verification Engineer interview process in India.

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