I applied through my friend.
After three months, I received a call for a one-hour phone interview. I answered all the questions.
The next day, I received confirmation for an onsite interview. I had ten days to prepare.
After two days, I received the confirmation.
Phone call Interview:
Physical Design Flow.
What problems did you face? How to remove Setup violation? How to remove Hold violation?
Unix commands: ls, cp, grep What is the command to check processes running? How to run a process in the background? Softlink command How to check disk usage?
Perl questions: chop vs chomp Array, hash, default scalar sign. What is the difference between an array and a hash when we do indexing?
Logic: He gave me one boolean expression to solve. Latch vs. flop. SRAM vs. DRAM? Which one is volatile? D FF using MUX. D FF operation.
Comp Arch: Pipeline? Cache? Virtual memory? TLB? What is the set size for a fully associative cache? Direct associative? He had given me a configuration.
Verilog: Blocking vs. nonblocking. Initial block? Always? FSM for 0101. Moore vs. Mealy? (Mealy is prone to glitches. This is what he wanted to hear). Verilog code for DFF.
Physical: Electromigration. Setup. Hold time. Skew? Effect of length, width, thickness on resistance. Effect of temperature, voltage on delay.
Onsite:
First round: She was also Trojan :-) (USC Fight On) Tell me about yourself. Why this transition? (Undergrad in Elec&Tele, job in software, and MS in EE) Physical Design flow? What to do to remove setup violation? Hold violation? Sizing, MOS structure, VI curve, effect of voltage on delay, temperature on delay? Problem on setup and hold using delay values. Power minimization techniques. She was going in depth. That's it.
Second round:
Unix commands: How to find .txt files, copy files from one directory to another.
Find files with a particular string.
How to execute Unix commands in a Perl script? (ANS: Use exec before each Unix command and done).
use strict?
What is the #!/usr/bin/perl we write at the start of a program?
C vs. Perl?
Read the file (set up violations). There are 1000 lines in that file. Print 5 worst delays.
Array vs. linked list with respect to memory allocation.
Pipeline? Stages? Which CPU is better? 1GHz vs. 2GHz.
Third round:
Physical design flow. Behavioral: Situation when you had a conflict with a friend. How you handled the situation. How you divide work while working in a group. How will you avoid conflict? (Divide work). How you finish work before a deadline? When you start working on something, you get some problems, you solve it, then how do you avoid the same mistake in the future? (I will note it down. He wanted to hear this). Skew, setup time, hold time.
Fourth round:
Physical Design Flow, synthesis steps, APR steps, problems related to setup and skew.
The following metrics were computed from 9 interview experiences for the Intel Graphics Hardware Engineer role in Folsom, California.
Intel's interview process for their Graphics Hardware Engineer roles in Folsom, California is incredibly easy as the vast majority of engineers get an offer after going through it.
Candidates reported having very good feelings for Intel's Graphics Hardware Engineer interview process in Folsom, California.