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Post Silicon Validation Engineer Interview Experience - Austin, Texas

October 28, 2012
Positive ExperienceGot Offer

Process

The interview took place from 9 AM to 3 PM.

I had lunch with recruiters.

The questions covered:

  • Computer architecture
  • Assembly languages (8086)
  • C language (linked lists and pointers)
  • Low power VLSI
  • Questions related to my projects and thesis work.

Questions

Draw the SOC for one of the projects I did.

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Interview Statistics

The following metrics were computed from 1 interview experience for the Intel Post Silicon Validation Engineer role in Austin, Texas.

Success Rate

100%
Pass Rate

Intel's interview process for their Post Silicon Validation Engineer roles in Austin, Texas is incredibly easy as the vast majority of engineers get an offer after going through it.

Experience Rating

Positive100%
Neutral0%
Negative0%

Candidates reported having very good feelings for Intel's Post Silicon Validation Engineer interview process in Austin, Texas.

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