Pre-Silicon Validation and Verification Engineer Interview Experience
Process
They didn't bother checking my qualifications and invited me for an interview for a position that was actually for PhD students, while I am an undergraduate student.
Upon realizing this, the interviewer became very cold and started talking down to me.
Questions
Questions about past experience with Verilog and VHDL
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Interview Statistics
The following metrics were computed from 4 interview experiences for the Intel Pre-Silicon Validation and Verification Engineer role in United States.
Success Rate
Intel's interview process for their Pre-Silicon Validation and Verification Engineer roles in the United States is very selective, failing most engineers who go through it.
Experience Rating
Candidates reported having very good feelings for Intel's Pre-Silicon Validation and Verification Engineer interview process in United States.
Intel Work Experiences
- 4.0Good Company, Market ChallengesPre-Silicon Validation and Verification Engineer • Current EmployeeVancouver, British Columbia, CanadaJuly 29, 2023Pros: Good company values; they treat employees well.Cons: Struggling to overcome the challenges of losing market leader position.
- 5.0Great Learning, Night MeetingsPre-Silicon Validation and Verification Engineer • Current EmployeeBengaluru, Karnataka, IndiaMarch 26, 2021Pros: Diversity Transparency Enormous opportunity to learn Great place to workCons: Night meetings due to site across different time zones.
- 5.0Learning, Growth, Overwhelming WorkPre-Silicon Validation and Verification Engineer • Current EmployeeGeorge Town, MalaysiaJanuary 17, 2022Pros: A lot to learn, and there's plenty of opportunity for growth.Cons: Workload sometimes is overwhelming.
Intel Interview Questions
