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Pre-Silicon Validation and Verification Engineer Interview Experience

November 1, 2015
Positive ExperienceGot Offer

Process

The interview consisted of behavioral and technical portions.

I didn't apply for this position initially, but after the interview, they asked me if I wanted to apply.

The manager and engineers were nice and knowledgeable.

The exciting part was talking about x86 because I have a lot of experience with it. Unfortunately, my x86 experience didn't have much value.

The gap between my expectation and the offer was too big.

Questions

Computer architecture pipeline, etc.

Problem-solving: Debug a failure.

Testbench and test plan.

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Interview Statistics

The following metrics were computed from 4 interview experiences for the Intel Pre-Silicon Validation and Verification Engineer role in United States.

Success Rate

25%
Pass Rate

Intel's interview process for their Pre-Silicon Validation and Verification Engineer roles in the United States is very selective, failing most engineers who go through it.

Experience Rating

Positive75%
Neutral0%
Negative25%

Candidates reported having very good feelings for Intel's Pre-Silicon Validation and Verification Engineer interview process in United States.

Intel Work Experiences