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SoC Validation Engineer Interview Experience - Hudson, Massachusetts

March 1, 2018
Positive ExperienceGot Offer

Process

I first had a 50-minute phone screening, followed by a 3-hour Skype interview, with one hour dedicated to each interviewer. All the interviewers, along with the manager, were really great and friendly.

Questions

1st interviewer: Asked me about computer architecture, a basic 5-stage pipeline, cache coherency, virtual memory, how to deal with metastability, and some basic Verilog questions.

2nd interviewer: Asked me to write the Fibonacci series in any scripting language I preferred, some basic concepts like LIFO and FIFO, stacks, etc.

3rd interviewer: Nothing too technical, but mostly asked about my verification experience in detail. They primarily wanted to know how well I understood verification methodologies.

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Interview Statistics

The following metrics were computed from 1 interview experience for the Intel SoC Validation Engineer role in Hudson, Massachusetts.

Success Rate

100%
Pass Rate

Intel's interview process for their SoC Validation Engineer roles in Hudson, Massachusetts is incredibly easy as the vast majority of engineers get an offer after going through it.

Experience Rating

Positive100%
Neutral0%
Negative0%

Candidates reported having very good feelings for Intel's SoC Validation Engineer interview process in Hudson, Massachusetts.

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