Great place to grow!
Great place to grow!
Provides the opportunity to learn, but definitely needs continuous effort to sustain in the organization. Good pay with great benefits!
Support and guidance might be less at times if you're taking up the role for the very first time.
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Intel Interview Experiences
Design Verification Engineer
The interview was average. It covered basic electronic questions, including Verilog, SystemVerilog (SV), and UVM basics. The HR round was disappointing. There was no clear communication from the company regarding the next steps in the process. They
Design Verification Engineer
Contacted by a recruiter. Went through: * Two rounds of technical phone interviews (1 on 1 with an engineer) * One round of on-site interview with the extended team.
Design Verification Engineer
It was technical and behavioral. I was asked questions about my resume and all previous experience, as well as technical details of the verification components I used in those projects and other related work. I would rate them as moderate in complex
Design Verification Engineer
IndiaOctober 1, 2021The interview was average. It covered basic electronic questions, including Verilog, SystemVerilog (SV), and UVM basics. The HR round was disappointing. There was no clear communication from the company regarding the next steps in the process. They
Design Verification Engineer
United StatesMay 21, 2024Contacted by a recruiter. Went through: * Two rounds of technical phone interviews (1 on 1 with an engineer) * One round of on-site interview with the extended team.
Design Verification Engineer
San Jose, California, United StatesMay 1, 2021It was technical and behavioral. I was asked questions about my resume and all previous experience, as well as technical details of the verification components I used in those projects and other related work. I would rate them as moderate in complex
