Good Work, Bad Weather
Good Work, Bad Weather
Good environment to work for long.
The weather is bad compared to other locations.
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Intel Interview Questions
Intel Interview Experiences
Design Verification Engineer
They asked about my Verilog projects and labs that I took in my coursework, and what I achieved in that lab coursework. The interview went slow. Then questions were on the digital domain. Questions on Verilog and C/C++: * STA * Verilog project
Design Verification Engineer
It was technical and behavioral. I was asked questions about my resume and all previous experience, as well as technical details of the verification components I used in those projects and other related work. I would rate them as moderate in complex
Design Verification Engineer
Internal Transfer within Intel Two phone/video interviews: * Manager interview * Team member interview Each interview is 90 minutes. Interview details: Discussion about experience relating to pre-silicon verification, specifically test bench
Design Verification Engineer
Bengaluru, Karnataka, IndiaAugust 1, 2024They asked about my Verilog projects and labs that I took in my coursework, and what I achieved in that lab coursework. The interview went slow. Then questions were on the digital domain. Questions on Verilog and C/C++: * STA * Verilog project
Design Verification Engineer
San Jose, California, United StatesMay 1, 2021It was technical and behavioral. I was asked questions about my resume and all previous experience, as well as technical details of the verification components I used in those projects and other related work. I would rate them as moderate in complex
Design Verification Engineer
United StatesJuly 1, 2022Internal Transfer within Intel Two phone/video interviews: * Manager interview * Team member interview Each interview is 90 minutes. Interview details: Discussion about experience relating to pre-silicon verification, specifically test bench
