Loved Intel, No Downsides
Loved Intel, No Downsides
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No downsides at Intel.
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Intel Interview Experiences
Post Silicon Validation Engineer
Two interviewers, about 2 hours total. Half was personal, and the other half was professional. They explained the recruiting process: two interviews with the same structure. No HR interview was planned, as opposed to other similar positions.
Post Silicon Validation Engineer
The interview took place from 9 AM to 3 PM. I had lunch with recruiters. The questions covered: * Computer architecture * Assembly languages (8086) * C language (linked lists and pointers) * Low power VLSI * Questions related to my projects and the
Post Silicon Validation Engineer
Profile was shortlisted. There were 3 rounds of interview. Each interview had a separate set of questions; one focused on system architecture, another on operating systems, and the last was on C/C++ concepts.
Post Silicon Validation Engineer
IsraelMarch 19, 2021Two interviewers, about 2 hours total. Half was personal, and the other half was professional. They explained the recruiting process: two interviews with the same structure. No HR interview was planned, as opposed to other similar positions.
Post Silicon Validation Engineer
Austin, Texas, United StatesOctober 28, 2012The interview took place from 9 AM to 3 PM. I had lunch with recruiters. The questions covered: * Computer architecture * Assembly languages (8086) * C language (linked lists and pointers) * Low power VLSI * Questions related to my projects and the
Post Silicon Validation Engineer
Bengaluru, Karnataka, IndiaJanuary 1, 2022Profile was shortlisted. There were 3 rounds of interview. Each interview had a separate set of questions; one focused on system architecture, another on operating systems, and the last was on C/C++ concepts.
