There were a lot of smart people there and many interesting projects. When times are good, the bonuses can be hefty.
Management is overly risk-averse, worried more about a project failing than of doing nothing and being beaten by the competition. The old data-driven Intel is long gone and is now run by sales and marketing types, with decisions now based on the best sales pitch.
Intel is no longer a growth company, with all the rewards that go along with it. The stock is unlikely to double in the foreseeable future as microprocessors become commodities and the huge profit margins disappear.
Listen to your senior Individual Contributors, if there are any left.
The process was quick and straightforward, involving interviews with just a couple of people. It was a good opportunity to learn about the company and ask questions. The interviewers were nice and helped foster a comfortable environment. The questi
The interview was lengthy, with numerous stages and deep, widely diverse technical questions. I was contacted via email and arranged for a phone interview. The manager then took me and his team to lunch for further discussion and technical question
The entire interview process was very friendly, especially the hiring manager. I had a one-hour phone screening interview, followed by a full panel on-site. I was asked to write some SystemVerilog code and was questioned on cache coherency protocol
The process was quick and straightforward, involving interviews with just a couple of people. It was a good opportunity to learn about the company and ask questions. The interviewers were nice and helped foster a comfortable environment. The questi
The interview was lengthy, with numerous stages and deep, widely diverse technical questions. I was contacted via email and arranged for a phone interview. The manager then took me and his team to lunch for further discussion and technical question
The entire interview process was very friendly, especially the hiring manager. I had a one-hour phone screening interview, followed by a full panel on-site. I was asked to write some SystemVerilog code and was questioned on cache coherency protocol