Asked questions on projects, SV and basic UVM. One must be good with Verilog and digital too. Make sure to brush up your fundamentals and be good to answer any question on it.
Why SV?
Verilog vs C
FSM,(Moore,Mealy differences and converting)
The following metrics were computed from 2 interview experiences for the Marvell Technology Design Verification Intern role in Bengaluru, India.
Marvell Technology's interview process for their Design Verification Intern roles in Bengaluru, India is fairly selective, failing a large portion of engineers who go through it.
Candidates reported having very good feelings for Marvell Technology's Design Verification Intern interview process in Bengaluru, India.