Phone screen with one interviewer.
Three coding questions.
Next step: Onsite/virtual interviews with four different engineers.
Write Verilog code for implementing a NAND gate using a MUX.
The following metrics were computed from 1 interview experience for the Meta ASIC Design Engineer role in Austin, Texas.
Meta's interview process for their ASIC Design Engineer roles in Austin, Texas is extremely selective, failing the vast majority of engineers.
Candidates reported having very good feelings for Meta's ASIC Design Engineer interview process in Austin, Texas.