The first HR call is on the phone, followed by the first round with the hiring manager.
Next is the technical and behavioral round. In the technical round, they asked me about SystemVerilog (SV) and Universal Verification Methodology (UVM), and I was given a problem to code based on SV.
Tell me about the UVM testbench top.
The following metrics were computed from 1 interview experience for the Meta ASIC Design Verification Engineer role in Oslo, Norway.
Meta's interview process for their ASIC Design Verification Engineer roles in Oslo, Norway is extremely selective, failing the vast majority of engineers.
Candidates reported having mixed feelings for Meta's ASIC Design Verification Engineer interview process in Oslo, Norway.