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ASIC Design Verification Engineer Interview Experience - Oslo, Norway

January 1, 2024
Neutral ExperienceNo Offer

Process

The first HR call is on the phone, followed by the first round with the hiring manager.

Next is the technical and behavioral round. In the technical round, they asked me about SystemVerilog (SV) and Universal Verification Methodology (UVM), and I was given a problem to code based on SV.

Questions

Tell me about the UVM testbench top.

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Interview Statistics

The following metrics were computed from 1 interview experience for the Meta ASIC Design Verification Engineer role in Oslo, Norway.

Success Rate

0%
Pass Rate

Meta's interview process for their ASIC Design Verification Engineer roles in Oslo, Norway is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive0%
Neutral100%
Negative0%

Candidates reported having mixed feelings for Meta's ASIC Design Verification Engineer interview process in Oslo, Norway.

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