The interview process was very comprehensive and went for about 7 hours straight through lunch. It was a fantastic experience, and no one tried to intimidate you. Instead, they all tried to give helpful hints so you could solve various scenarios.
It gets very technical, ranging from electrical fundamentals to RF fundamentals, and then they start to dig deep into each aspect.
Know your chip caps really well! I was asked questions on Smith charts, impedance matching, typical RF receiver/transmitter systems, signal integrity issues, and characteristics of RF amps.
As far as behavioral questions were concerned, they included challenges faced in your last project, how you solved them, and what your ex-boss would say about you if I asked him for a reference.
The following metrics were computed from 1 interview experience for the Microsoft Design Verification Engineer role in Redmond, Washington.
Microsoft's interview process for their Design Verification Engineer roles in Redmond, Washington is extremely selective, failing the vast majority of engineers.
Candidates reported having very good feelings for Microsoft's Design Verification Engineer interview process in Redmond, Washington.