I went through three technical interviews, each conducted by a team lead from a different formal verification team.
In the first interview, I was asked to implement a waveform edge detector using flip-flops and logic gates, then write SystemVerilog assertions to cover the design. I was also asked to write a function in SystemVerilog.
In the second interview, I was asked a logic puzzle, followed by a coding problem to solve in pseudocode.
The third interview included a logic question, an implementation of multiplication using only ADD and JUMP in assembly, and then the implementation of a digital component using logic gates.
The process was professional and challenging, with a strong focus on both practical coding and logical thinking.
Q: How would you implement a multiplication function using only ADD and JUMP instructions in assembly?
The following metrics were computed from 1 interview experience for the Mobileye Formal Verification Engineer role in Petah Tikva, Israel.
Mobileye's interview process for their Formal Verification Engineer roles in Petah Tikva, Israel is incredibly easy as the vast majority of engineers get an offer after going through it.
Candidates reported having very good feelings for Mobileye's Formal Verification Engineer interview process in Petah Tikva, Israel.