This was a new grad position. The interview consisted of two rounds:
Knowledge of Perl was expected. Puzzle-based digital design questions were also asked.
Design a MUX using only NOT, AND, and OR gates.
What is clock domain crossing?
How do you overcome CDC issues? Detailed questions on each method.
What is Gray code encoding and how is it used to overcome CDC?
The following metrics were computed from 1 interview experience for the Nvidia ASIC Clocks Engineer role in Santa Clara, California.
Nvidia's interview process for their ASIC Clocks Engineer roles in Santa Clara, California is extremely selective, failing the vast majority of engineers.
Candidates reported having mixed feelings for Nvidia's ASIC Clocks Engineer interview process in Santa Clara, California.