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ASIC Clocks Engineer Interview Experience - Santa Clara, California

February 1, 2024
Neutral ExperienceNo Offer

Process

This was a new grad position. The interview consisted of two rounds:

  • Coding in the language preferred.
  • Technical questions based on Physical Design.

Knowledge of Perl was expected. Puzzle-based digital design questions were also asked.

Questions

Design a MUX using only NOT, AND, and OR gates.

What is clock domain crossing?

How do you overcome CDC issues? Detailed questions on each method.

What is Gray code encoding and how is it used to overcome CDC?

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Interview Statistics

The following metrics were computed from 1 interview experience for the Nvidia ASIC Clocks Engineer role in Santa Clara, California.

Success Rate

0%
Pass Rate

Nvidia's interview process for their ASIC Clocks Engineer roles in Santa Clara, California is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive0%
Neutral100%
Negative0%

Candidates reported having mixed feelings for Nvidia's ASIC Clocks Engineer interview process in Santa Clara, California.

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