I had two phone interviews. I thought the first one went badly. I was first asked about my previous experience. Then I was asked technical questions. I was asked about 4 technical questions per interview. They also build upon the questions that they asked and grilled you to see if you understand. Definitely prepare. Read back your logic design class and your digital circuit class. Speak out loud your thinking process. If you do not know how to answer a question, just tell them what you know and truthfully admit that you do not know the answer.
The first one was about implementing a NOT gate with MUX.
The second was about a state machine, how to output true for every two consecutive 1s.
I was also asked about why CMOS is used in implementing logic gates. Next, I was asked about the sizing of transistors for a 2-input NAND gate.
I was asked to create an XOR gate using only NOR gates.
Using 3 registers and two two-bit full adders, how to count to 9 given that one clock cycle is only enough for the delay of a full adder.
The following metrics were computed from 71 interview experiences for the Nvidia ASIC Design Engineer role.
Nvidia's interview process for their ASIC Design Engineer roles is very selective, failing most engineers who go through it.
Candidates reported having very good feelings for Nvidia's ASIC Design Engineer interview process.