Phone interview after applying online, followed by coding in a shared Google Doc about Verilog questions. The questions are medium level, and I found it challenging to solve them without being able to show drawings for my answers.
Implement a counter.
Analyze signal diagram.
The following metrics were computed from 2 interview experiences for the Nvidia ASIC Design Engineer role in Portland, Oregon.
Nvidia's interview process for their ASIC Design Engineer roles in Portland, Oregon is extremely selective, failing the vast majority of engineers.
Candidates reported having mixed feelings for Nvidia's ASIC Design Engineer interview process in Portland, Oregon.