It is only a phone interview with one of the hiring manager, I think. I don't know why I can hardly hear him even though I was in a very quiet place. He asked about how to calculate setup and hold time by giving some parameters in the circuit. He also asked about a frequency divider by 3 with 50% duty cycle.
Frequency divider
Setup hold time calculation
The following metrics were computed from 4 interview experiences for the Nvidia ASIC Design Engineer role in San Jose, California.
Nvidia's interview process for their ASIC Design Engineer roles in San Jose, California is extremely selective, failing the vast majority of engineers.
Candidates reported having mixed feelings for Nvidia's ASIC Design Engineer interview process in San Jose, California.