Two rounds of phone screening focused on fundamentals rather than previous projects.

Five rounds of on-site one-on-one interviews.

Engineers were super nice and professional; it was a great experience.

The recruiter sat down with me and went through the hiring process but did not ask about salary expectations.

How do you, as a back-end designer, work with front-end (RTL/Synthesis) designers to solve tough timing problems? For example, under what circumstances do you absolutely need them to solve on their side? What information or files do you provide to them?

Why is setup in ICG tough to solve?

Describe an application where you would use a latch.

Suppose you have a 4-bit shift register made using D-type flip-flops with a positive Clock-to-Q delay and a hold time of 0. Is it possible for this circuit to have hold time violations? Why?

Suppose you discover that the circuit you are testing in the lab does not function correctly due to a hold time violation. What would be the first thing you try to make the circuit work?

Who does CPPR affect on a noise glitch?