Contacted by HR. Was asked questions on digital logic design, static timing analysis, and C programming. The interview was purely technical. The difficulty level was high.
Question 1: What is setup time? What is hold time?
Question 2: Which is better, a setup or hold time violation?
Question 3: If we have a setup constraint in the given circuit, how can we solve it?
Question 4: Was given a circuit and told that there is a setup violation; how to solve it?
Which is better: a setup time or a hold time violation?
The following metrics were computed from 2 interview experiences for the Nvidia ASIC role in United States.
Nvidia's interview process for their ASIC roles in the United States is fairly selective, failing a large portion of engineers who go through it.
Candidates reported having very good feelings for Nvidia's ASIC interview process in United States.