The first round of interviews contained two coding problems.
The first problem was related to bit masking. The second problem was to write a C++ class for maintaining a FIFO list.
Bitmasking using SystemVerilog and C++ classes
The following metrics were computed from 1 interview experience for the Nvidia Design Verification Engineer role in Chicago, Illinois.
Nvidia's interview process for their Design Verification Engineer roles in Chicago, Illinois is extremely selective, failing the vast majority of engineers.
Candidates reported having very good feelings for Nvidia's Design Verification Engineer interview process in Chicago, Illinois.