A great place to be if you want to enjoy work
A great place to be if you want to enjoy work
No hierarchy system; you can directly approach top management for any concerns. People are supportive of freshers and enjoy working here.
Not much work-life balance; to explore, you need to give extra hours from your work time.
Great place to work! Kudos!
Make engineers free periodically in some rotatory manner to allow them to explore their interests.
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Nvidia Interview Questions
Nvidia Interview Experiences
ASIC Engineer
First resume shortlisting, then OA, then interviews of 1 hr each. Started with my projects, then asked on CMOS, computer architecture, and some digital electronics questions. Then asked a puzzle at last.
ASIC Engineer
Number of rounds: * Written test * Technical round * Technical round * Technical round * HR * Director (puzzle) All rounds were completed in a single day. They provided lunch. Panel members were friendly. They mostly checked basic knowledge and how
ASIC Engineer
Two rounds of interviews followed the resume shortlist. Each round consisted of two hours with two interviewers. Questions were based in: * VLSI design * Embedded systems * STA * PNR * Pipelining * Verilog More emphasis was laid on out-of-the-box
ASIC Engineer
Bengaluru, Karnataka, IndiaSeptember 13, 2026First resume shortlisting, then OA, then interviews of 1 hr each. Started with my projects, then asked on CMOS, computer architecture, and some digital electronics questions. Then asked a puzzle at last.
ASIC Engineer
Bengaluru, Karnataka, IndiaDecember 1, 2017Number of rounds: * Written test * Technical round * Technical round * Technical round * HR * Director (puzzle) All rounds were completed in a single day. They provided lunch. Panel members were friendly. They mostly checked basic knowledge and how
ASIC Engineer
Bengaluru, Karnataka, IndiaJuly 1, 2021Two rounds of interviews followed the resume shortlist. Each round consisted of two hours with two interviewers. Questions were based in: * VLSI design * Embedded systems * STA * PNR * Pipelining * Verilog More emphasis was laid on out-of-the-box
