Taro Logo

Design Verification Engineer Interview Experience - India

May 29, 2024
Positive ExperienceGot Offer

Process

There were 3 rounds of technical interviews followed by HR. All the 3 rounds happened on the same day. Technical questions were basically from System Verilog, UVM, constraint writing, assertion writing, and some basic digital questions.

Questions

Q. Write an assertion on a stated scenario. Q. Answer questions on code and functional coverage.

Was this helpful?

Interview Statistics

The following metrics were computed from 4 interview experiences for the NXP Semiconductors Design Verification Engineer role in India.

Success Rate

50%
Pass Rate

NXP Semiconductors's interview process for their Design Verification Engineer roles in India is fairly selective, failing a large portion of engineers who go through it.

Experience Rating

Positive75%
Neutral0%
Negative25%

Candidates reported having very good feelings for NXP Semiconductors's Design Verification Engineer interview process in India.