It was an online assessment. It started with logic gates questions, a truth table, and there was a question on SystemVerilog debugging. Then there were coding questions on networking, data structures, and basic coding.
Debugging RTL code in SystemVerilog.
The following metrics were computed from 1 interview experience for the Optiver FPGA Intern role in Chicago, Illinois.
Optiver's interview process for their FPGA Intern roles in Chicago, Illinois is extremely selective, failing the vast majority of engineers.
Candidates reported having mixed feelings for Optiver's FPGA Intern interview process in Chicago, Illinois.