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Hardware Engineer of SPARK chip design

Principal Hardware Engineer
Current Employee
Has worked at Oracle for 20 years
September 5, 2016
Santa Clara, California
3.0
Doesn't RecommendNegative OutlookNo CEO Opinion
Pros

Hardware design of chip integration, DEF/LEF base implementation, GDS2 handling, Calibre DRC code and physical verification, Cadence SKILL code to handle layout and schematic, ICC base flow.

Cons

software development, such as operating systems, compilers, SQL, etc.

Advice to Management

needs more recognition and appreciation

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