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ASIC Design Engineer Interview Experience - San Diego, California

March 1, 2010
Neutral ExperienceNo Offer

Process

Questions about designing Logic modules using gates and transistors.

Questions about setup time, hold time, etc.

Design problem as a pattern recognizer design.

Interviewed by a non-native American with a weird accent.

Questions

Using only NAND gates to design some logic.

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Interview Statistics

The following metrics were computed from 4 interview experiences for the Qualcomm ASIC Design Engineer role in San Diego, California.

Success Rate

25%
Pass Rate

Qualcomm's interview process for their ASIC Design Engineer roles in San Diego, California is very selective, failing most engineers who go through it.

Experience Rating

Positive25%
Neutral75%
Negative0%

Candidates reported having very good feelings for Qualcomm's ASIC Design Engineer interview process in San Diego, California.

Qualcomm Work Experiences