Questions about designing Logic modules using gates and transistors.
Questions about setup time, hold time, etc.
Design problem as a pattern recognizer design.
Interviewed by a non-native American with a weird accent.
Using only NAND gates to design some logic.
The following metrics were computed from 4 interview experiences for the Qualcomm ASIC Design Engineer role in San Diego, California.
Qualcomm's interview process for their ASIC Design Engineer roles in San Diego, California is very selective, failing most engineers who go through it.
Candidates reported having very good feelings for Qualcomm's ASIC Design Engineer interview process in San Diego, California.