I applied for ASIC Test Methodology / Simulation Engineer roles through CareerBuilder in July. Two weeks later, I received an email to schedule a phone interview.

1. The interviewer explained the job and their team's responsibilities. Then, they asked me to explain how my skills fit the role.

2. When I mentioned the VLSI testing course I am pursuing this quarter, she asked a series of questions on VLSI testing.

3. What is ATPG?

4. She then asked many questions related to analog circuits, as I had completed a few projects in that area. Since ADC was on my resume, she asked numerous questions about ADCs, such as how to check an ADC's output and asked about DNL.

If the output of an ADC is fed into the input of an SoC and the SoC's output is faulty, how would you determine if the ADC output is correct or faulty? Conversely, if the SoC is working perfectly, how would you determine a fault in the ADC's output?

She also asked a few more questions based on my resume.

Describe the CMOS inverter and its I-V characteristic.

She asked several questions on Verilog.

She asked several questions on VHDL.

She asked some questions on timing.

What is SFDR?

She asked some questions related to VLSI testing.

The flash ADC can be used for 15 bits.