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Design Verification Engineer Noida Interview Experience - Bengaluru, India

July 1, 2019
Positive ExperienceGot Offer

Process

I interviewed at Qualcomm (Bangalore) in September 2019.

I applied through LinkedIn with one employee referral. HR mailed and scheduled the interview after one week.

It was a one-day process with five rounds of interviews: four technical and one HR round.

The technical interviews were based on basic UVM and SV concepts, and related to my projects. They also covered SOC-related concepts, microprocessor and SOC architecture. Some questions were related to the AMBA bus protocol.

Questions

What are the different phases in UVM and why do we use phases in UVM?

What is the difference between AXI and AHB, based on AXI channels?

Related to projects and your role in the project.

SV testbench, interface, clocking blocks, program block, virtual interface.

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Interview Statistics

The following metrics were computed from 1 interview experience for the Qualcomm Design Verification Engineer Noida role in Bengaluru, Karnataka.

Success Rate

100%
Pass Rate

Qualcomm's interview process for their Design Verification Engineer Noida roles in Bengaluru, Karnataka is incredibly easy as the vast majority of engineers get an offer after going through it.

Experience Rating

Positive100%
Neutral0%
Negative0%

Candidates reported having very good feelings for Qualcomm's Design Verification Engineer Noida interview process in Bengaluru, Karnataka.

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